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Combinational Logic Circuits Quiz
1. The difference between a PLA and PAL is
The PLA has a programmable OR plane and a programmable AND plane, while the PAL only has a programmable AND plane
The PAL has a programmable OR plane and a programmable AND plane , while the PLA only has a programmable AND plane
The PAL has more possible product terms than the PLA
PALs and PLAs are the same thing
Submit
2.PALs tend to execute _______ logic
SAP
SOP
PLA
SPD
Submit
3. SPLDs , CPLDs and FPGAs are all which type of device?
PAL
PLD
EPROM
SRAM
Submit
4.Why have PLDs taken over to much of the market?
One PLD does the work of many ICs.
The PLDs are cheaper
Less power is required
All of the above
Submit
5.What does a dot mean when places on a PLD circuit diagram?
A point that is programmable
A point that cannot change
An intersection of logic blocks
An input or output point
Submit
6.How many 3-line-to-8-line decoders are required for a 1-of-32 decoder?
1
2
4
8
Submit
7. Which gate is best used as a basic comparator?
NOR
OR
Exclusive_OR
AND
Submit
8.The Binary Numbers A= 1100 and B= 1001 are applied to the inputs of a comparator. What are the output levels?
A > B =1, A < B = 0 , A < B = 1
A > B = 0, A < B = 1 , A = B = 0
A > B = 1, A < B = 0 , A = B = 0
A > B = 0 , A < B = 1 , A = B = 1
Submit
9.Two 4-bit binary numbers (1011 and 1111) are applied to a 4-bit parallel adder. The carry input is 1. What are the values for the sum and carry output?
sum = 0111, Cout = 0
sum = 1111, Cout = 1
sum = 1010, Cout = 1
sum = 1100, Cout = 1
Submit
10. Which of the following is in the sum-of-products form?
(A + B)(C + D)
(AB)(CD)
AB(CD)
AB + CD
Submit
11. A decoder can be used as a demultiplexer by ________.
tying all enable pins LOW
tying all data-select lines LOW
tying all data-select lines HIGH
using the input lines for data selection and an enable line for data input
Submit
12.A full-adder has a Cin = 0. What are the sum and the carry (Cout) when A = 1 and B = 1?
sum = 0, Cout = 0
sum = 0, Cout = 1
sum = 1, Cout = 0
sum = 1, Cout = 1
Submit
13. When adding an even parity bit to the code 110010, the result is ________.
1110010
110010
1111001
001101
Submit
14.How many outputs would two 8-line-to-3-line encoders, expanded to a 16-line-to-4-line encoder, have?
3
4
5
6
Submit
Your Answer is CORRECT.The Answer is A
A.The PLA has a programmable OR plane and a programmable AND plane, while the PAL only has a programmable AND plane
B.The PAL has a programmable OR plane and a programmable AND plane , while the PLA only has a programmable AND plane
C.The PAL has more possible product terms than the PLA
D.PALs and PLAs are the same thing
Next
Your Answer is CORRECT.The Answer is B
A.SAP
B.SOP
C.PLA
D.SPD
Next
Your Answer is CORRECT.The Answer is B
A.PAL
B.PLD
C.EPROM
D.SRAM
Next
Your Answer is CORRECT.The Answer is D
A.One PLD does the work of many ICs.
B.The PLDs are cheaper
C.Less power is required
D.All of the above
Next
Your Answer is CORRECT.The Answer is B
A.A point that is programmable
B.A point that cannot change
C.An intersection of logic blocks
D.An input or output point
Next
Your Answer is CORRECT.The Answer is C
A.1
B.2
C.4
D.8
Next
Your Answer is CORRECT.The Answer is C
A.NOR
B.OR
C.Exclusive_OR
D.AND
Next
Your Answer is CORRECT.The Answer is C
A.A > B =1, A < B = 0 , A < B = 1
B.A > B = 0, A < B = 1 , A = B = 0
C.A > B = 1, A < B = 0 , A = B = 0
D.A > B = 0 , A < B = 1 , A = B = 1
Next
Your Answer is CORRECT.The Answer is C
A. sum = 0111, Cout = 0
B. sum = 1111, Cout = 1
C. sum = 1010, Cout = 1
D. sum = 1100, Cout = 1
Next
Your Answer is CORRECT.The Answer is D
A.(A + B)(C + D)
B.(AB)(CD)
C.AB(CD)
D.AB + CD
Next
Your Answer is CORRECT.The Answer is D
A.tying all enable pins LOW
B.tying all data-select lines LOW
C.tying all data-select lines HIGH
D.using the input lines for data selection and an enable line for data input
Next
Your Answer is CORRECT.The Answer is B
A. sum = 0, Cout = 0
B. sum = 0, Cout = 1
C. sum = 1, Cout = 0
D. sum = 1, Cout = 1
Next
Your Answer is CORRECT.The Answer is A
A.1110010
B.110010
C.1111001
D.001101
Next
Your Answer is CORRECT.The Answer is B
A.3
B.4
C.5
D.6
Next
Your Answer is WRONG.The Answer is A
A.The PLA has a programmable OR plane and a programmable AND plane, while the PAL only has a programmable AND plane
B.The PAL has a programmable OR plane and a programmable AND plane , while the PLA only has a programmable AND plane
C.The PAL has more possible product terms than the PLA
D.PALs and PLAs are the same thing
Next
Your Answer is WRONG.The Answer is B
A.SAP
B.SOP
C.PLA
D.SPD
Next
Your Answer is WRONG.The Answer is B
A.PAL
B.PLD
C.EPROM
D.SRAM
Next
Your Answer is WRONG.The Answer is D
A.One PLD does the work of many ICs.
B.The PLDs are cheaper
C.Less power is required
D.All of the above
Next
Your Answer is WRONG.The Answer is B
A.A point that is programmable
B.A point that cannot change
C.An intersection of logic blocks
D.An input or output point
Next
Your Answer is WRONG.The Answer is C
A.1
B.2
C.4
D.8
Next
Your Answer is WRONG.The Answer is C
A.NOR
B.OR
C.Exclusive_OR
D.AND
Next
Your Answer is WRONG.The Answer is C
A.A > B =1, A < B = 0 , A < B = 1
B.A > B = 0, A < B = 1 , A = B = 0
C.A > B = 1, A < B = 0 , A = B = 0
D.A > B = 0 , A < B = 1 , A = B = 1
Next
Your Answer is WRONG.The Answer is C
A. sum = 0111, Cout = 0
B. sum = 1111, Cout = 1
C. sum = 1010, Cout = 1
D. sum = 1100, Cout = 1
Next
Your Answer is WRONG.The Answer is D
A.(A + B)(C + D)
B.(AB)(CD)
C.AB(CD)
D.AB + CD
Next
Your Answer is WRONG.The Answer is D
A.tying all enable pins LOW
B.tying all data-select lines LOW
C.tying all data-select lines HIGH
D.using the input lines for data selection and an enable line for data input
Next
Your Answer is WRONG.The Answer is B
A. sum = 0, Cout = 0
B. sum = 0, Cout = 1
C. sum = 1, Cout = 0
D. sum = 1, Cout = 1
Next
Your Answer is WRONG.The Answer is A
A.1110010
B.110010
C.1111001
D.001101
Next
Your Answer is WRONG.The Answer is B
A.3
B.4
C.5
D.6
Next